Engineered to the highest specifications, our silica Contamination Wafer Standards and particle wafer standards are deposited on Ultraclean silica wafers and are essential for maintaining size and calibration accuracy of Wafer Inspection Systems used in Semiconductor Metrology Labs around the world.
Overview of Calibration Wafer Standards
Calibration Wafer Standards are normally deposited with polystyrene microspheres, between 20 nanometer and 15 microns particle diameter. These standards are referred to as PSL Wafer Standards, Particle Wafer Standards, Contamination Wafer Standards and Calibration Wafer Standards. The process to create a wafer calibration standard is called particle deposition and typically would use a Differential Mobility Analyzer (DMA technology) to filter out unwanted particle sizes from a desired particle diameter to be deposited on the wafer surface. Particle Size Standards are NIST Traceable polystyrene microspheres, highly accurate in particle diameter and typically deposited as a FULL Deposition across the entire silicon wafer surface, quartz mask or customer supplied FILM wafer. This particle deposition can also be accomplished by placing small SPOT Depositions around the surface of the wafer or mask, for example 4 spot deps on a 200mm wafer standard.
Particle Deposition System
This image below describes a typical Particle Deposition System.
NIST Traceable particles are mixed into a solution of pure de-ionized water and placed into an atomizer. In this image there are 4 atomizers to select from in the Particle Deposition System, thus 4 different particle sizes can be selected. The particle solution selected, if scanned by a liquid particle counter, would show a peak at the desired particle peak and typically has smaller background particles found in the DI Water. The particle solution is aerosolized into very small water droplets, which contain particles in the droplets. The droplets are then evaporated so that only a particle stream remains. The evaporation process generates positive and negative charged particles, so the particles are directed through a charge neutralizer to remove unwanted particle charging. The particle stream is then directed into the Differential Mobility Analyzer.
As the image at left shows the histogram of the particle distribution shows a desired particle peak and the unwanted background particles. The DMA uses a controlled airflow and electrical charging to isolate a desired particle size; thus the DMA can filter out large unwanted particles, as well as smaller background particles; passing only the desired particle size peak. The output from the DMA is counted for an approximate count, and then deposited onto the wafer surface as a FULL Deposition or a SPOT Deposition, perhaps four different SPOT sizes deposited around the Wafer Standard.
Importance of Wafer Cleanliness
When creating a Particle Wafer Standard, the first priority is to start with a clean wafer. As an example, 300mm ultraclean wafers are cleaned down to 26nm surface clean. This allows particles greater than 30 nm to be deposited with little surface contamination on the wafer. As the wafer technology goes back in time from 300mm to 200mm and 150mm wafers, the wafers were not nearly as clean or polished as well as a 300mm wafer standard. For example, 200mm wafers are cleaned down to a typical 80nm particle diameter, and 150mm to 100mm wafers are cleaned down to perhaps 200nm particle diameters. As the wafer diameter increased, the surface polish had to improve, and the cleaning techniques had to improve so that ever small device geometry could be created on the silica surface.
Wafer Cleaning Techniques
Cleaning a wafer is typically a chemical clean, however polishing the wafer to a smooth surface as well as a flat surface is far more complex, and not discussed here. Once the wafer is clean, an SSIS (surface scanning inspection system) scans the surface of the wafer searching for particle responses. As an example, an ultraclean 300mm silica wafer would be relatively particle free down to about 26nm particle diameter. So, depositing a 26nm particle peak on the wafer surface would seem to be straightforward, but now the laser scanning technology of the SSIS tool begins to influence the counting of particles on the wafer surface.
Interaction of Laser and Wafer Surface
As the laser scans the silica surface and encounters a particle, an AC signal is detected by the optical detection system. At the same time, the laser is reflecting off the surface of the imperfectly polished wafer, there is a DC electrical signal that describes the undulating surface polish, historically referred to as Haze. We as humans would see a perfect image of ourselves in our reflection of a well-polished, highly clean wafer; but as the laser reflects off the surface each moment of time, the photo diode detector picks up all the undulations in the amorphous surface polish, detected as a constantly fluctuating, DC electrical signal. As the SSIS tools scans the surface of a 300mm wafer, it detects AC particle signals as each particle is scanned over by the laser; and it encounters a constant, but varying DC electrical signal; that represents the surface polish, or Haze, of the wafer. As the DC electrical signal decreases, as detected by the photo diode detector, the surface polish (smoothness) at an Angstrom level improves, and as the DC electrical signal increases, it represents a worsening of the polished surface at an Angstrom level.
Requirements for Wafer Standard Deposition
Depositing a Wafer Standard then requires a very clean surface, but also a highly polished, flat silicon wafer surface. This would permit a 26nm or even an 18nm particle deposition on an ultraclean 300mm surface, detectable by an SSIS tool, which then allows that SSIS tool to be calibrated to the size peak, as this example 18 nanometer particle deposition. The smallest particle size that could be detected on the surface of a wafer is controlled by the level of particle removal from the surface and limited by the level of surface polish on the wafer surface. A 200mm wafer with an 80nm clean and typical surface polish would allow an 80nm particle peak to be detected by an SSIS tool using a normal 90 degree scan angle. If the SSIS tool has improved low angle scanning technology, it is possible to scan down to 50nm on a 200mm wafer. 300mm wafers with 18nm cleans can be scanned by a low angle SSIS tool and theoretically detect down to 15nm on a 300mm ultraclean wafer surface.
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